Modern electronic products including computers, consumer electronics, telecommunication equipment and automotive electronics require circuit interconnection. While off-chip interconnection and packaging densities have somewhat improved over the years, progress has been far slower than for on-chip semiconductor devices, where the dramatic decrease in circuit feature size has increased IC circuit densities from 250 K to 64 MB in memory devices. The typical width of present-day circuit contact pads for solder interconnection is about 25 mils (625 .mu.m) for printed circuit boards, and about 4 mils (100 .mu.m) for silicon-on-silicon flip-chip devices. This enormous imbalance between the micron-level features of silicon devices and the hundreds-of-microns required for contact pads has forced inefficient device integration. A large area of device real estate is wasted on fan-outs to larger-area, soldering contact pads. This fan out also results in longer travel path for electrons and hence slower device speed than could be realized with a compact, high-density interconnection scheme.
Most circuit board interconnections between mating contact pads utilize solder materials, such as the eutectic lead-tin solder (37 Pb-63 Sn). The solder materials are melted and solidified either by wave soldering or by surface mounting techniques. These techniques are described in Soldering Handbook for Printed Circuits and Surface Mounting, by H. H. Manko, Van Nostrand Reinhold, N.Y., 1986. The surface mounting procedure is typically based on screen printing technology with the wet solder paste printed on each circuit pad of the substrate board to be solder interconnected. Alternatively, the solder may be deposited on each of the contact pads by physical or chemical vapor deposition or by electrochemical deposition, in combination with photolithography.
Two of the main technical barriers to the achievement of high or ultra-high-density interconnections using smaller contact pad size are i) the absence of an industrially-viable technique for screen printing the solder paste below about 6 mil line width resolution and ii) the difficulty and high cost of large-area photolithography below the resolution of about 2 mil. Accordingly, there is a need for a new high density interconnection technology which is not restricted by screen printing or lithography. The present invention discloses such a technology.